IBM offered an early look at its next-generation mainframe processor, featuring a new architecture designed to churn AI workloads faster and provide improved security and fraud detection for users in banking, finance and insurance.
Telum is IBM's first processor to contain on-chip acceleration for AI inferencing while transactions are taking place. The chip, which has been in development for three years, is expected to arrive in the first half of 2022 along with the company's next Z series mainframe.
An important differentiator with Telum compared with its predecessor is it permits applications to run where the data resides, sidestepping the traditional approaches to AI that require the memory and data movement needed to handle inferencing. With Telum, the accelerator is positioned closer to the data and applications so users can carry out high-volume inferencing for real-time transactions without calling on off-platform AI functions, which hinders performance, according to IBM.
"We've engineered [Telum] specifically for heavy-duty enterprise workloads involving transaction and batch processing workloads," said Christian Jacobi, an IBM distinguished engineer and chief architect for IBM Z processor design in a press briefing. "But those [mainframe] users also rely on us to offer solid security and availability where we have introduced a number of innovations."
AI could boost mainframe sales
With a growing interest among mainframe users to implement AI-based applications and workloads, the arrival of Telum could prove well-timed.
Judith HurwitzPresident and CEO, Hurwitz & Associates
"To do AI implementations right can be a really complicated deal when you are processing massive amounts of data," said Judith Hurwitz, president and CEO of Hurwitz & Associates LLC in Cambridge, Mass. "But building a system with this level of compute could give [IBM] another selling point for the mainframe."
The newly architected chip contains eight processor cores, using what company officials say is a deep-scalar out-of-order instruction pipeline running with more than 5 GHz clock frequency. The chip has a newly designed and larger cache and chip interconnection infrastructure that offers 32 MB cache per core, and users can scale up to 32 Telum processors.
The 7-nanometer chip has a dual chip module design containing 22 billion transistors and was created by the IBM Research AI Hardware Center. Samsung, IBM's long-time chip partner, will manufacture the processor.
The new on-chip AI accelerator achieves a 40% gain in performance at the socket level, according to Jacobi. That means every socket in the new processor, compared with processor sockets in the existing Z15, performs up to 40% more work.
"The added speed is achieved not just by adding more cores, but larger caches," Jacobi said. "And we will further optimize the firmware and software stack that is going to run on the next generation of mainframes."
The offering not only speeds the performance of AI workloads, but it also reduces the latency involved with security and fraud detection.
"Sending private data over a network requires cryptography and the auditing of security standards, creating a lot of complexity in an enterprise environment," said Kailash Gopalakrishnan, an IBM fellow and senior manager of accelerator architectures and machine learning at IBM Research, in a press briefing. "We've designed the accelerator to operate directly on the data using virtual address and data protection mechanisms that naturally apply to the IBM Z processor."
From fraud detection to fraud protection
Ross Mauri, general manager for IBM Z and LinuxOne, said he hopes the expanded security capabilities of the chip will help reshape users' views on handling security.
"We hope Telum can shift clients' thinking from one of fraud detection to a fraud prevention," Mauri said. "We think this [chip] can bring in an era of prevention of fraud at scale without impacting service-level agreements before transactions are completed."
Frank Dzubeck, president of Communications Network Architects, agreed the added speed will allow security software to do its job faster and close the window of opportunity for would-be hackers, something that should help sell the next generation of IBM mainframes. But all the new benefits of the rearchitected processor should draw old and new users, he added.
"The security improvements are significant when you look at their whole onboard encryption acceleration," Dzubeck said. "But the whole caching structure, AI capabilities and even saving on power consumption should make users take a hard look at the system that comes out next year."
To accommodate the new technologies in the upcoming processor, IBM took a radically different approach to chip packaging. It starts with dual chips packed into a single module -- four such modules can be packed into one drawer, or a motherboard with four sockets. In previous generations, the company had to use two different chip types along with a system control chip that contained a physical port. The new packaging eliminates the need for the system control chip, Jacobi said.
When asked if Telum will be available for users of existing systems as an in-place upgrade, or if they would need the assistance of IBM's technical services group or have to buy the new system next year, Mauri was noncommittal.
"We are not previewing the system right now; we're just talking about the chip," he said. "Details will come out in the future."
As editor at large for TechTarget's News Group, Ed Scannell is responsible for writing and reporting breaking news, news analysis and features focused on technology issues and trends affecting corporate IT professionals. He has also worked for 26 years at Infoworld and Computerworld covering enterprise class products and technologies from larger IT companies including IBM and Microsoft, as well as serving as editor of Redmond for three years overseeing that magazine's editorial content.