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AMD completes 45-nm processor, but quad-core Opterons still delayed

AMD has officially completed its first 45-nm quad-core processor, but those waiting for quad-core Barcelona will have to wait until April.

Advanced Micro Devices Inc. (AMD) announced it has completed development of its first 45-nanometer (nm) processor, another native quad-core CPU code-named Shanghai, which it demonstrated at the CeBit electronics exhibition in Dresden, Germany, March 4 in AMD's Fab 36 300-millimeter manufacturing facility.

For more on quad-core processing and AMD:
AMD Barcelona officially available -- at last

AMD quad-core Barcelona supported by OS heavyweights

But the 45-nm milestone from the Sunnyvale, Calif.-based AMD came as users await the delayed release of company's first native quad-core AMD Opteron processor processor, aka Barcelona, which was introduced in September 2007. After AMD discovered an errata, mass shipments of the processor stalled, but now an updated quad-core Opteron processor, B3, are expected by April.

As for the 45-nm Shanghai, it is expected to be available in the second half of this year, said Tom Sonderman, the vice president of AMD manufacturing technologies.

By condensing the CPU transistors from 65 nm down to 45 nm, AMD can add cache memory directly onto the chip. The four cores on the 45 nm Shanghai will share 6 MB of Level 3 cache, which will increase performance per watt, Sonderman said.

By going to 45 [nanometer], we have been able to beef up the cache on the die.
Tom Sonderman,
VP of manufacturing technologiesAdvanced Micro Devices Inc.

In contrast, the 65-nm Barcelona processor doesn't have Level 3 cache on the chip; all of its memory is located off the chip, and its level 3 cache is 2 MB.

"By going to 45 nm, we have been able to beef up the cache on the die. Having cache directly on the chip increases performance, because going off the chip uses a clock cycle and in turn hurts performance," Sonderman said.

The upcoming quad-core Shanghai will also have 512 MB of Level 2 cache per core and will use second-generation double data rate (DDR) memory.

As with Barcelona, Shanghai will also include features like Direct Connect Architecture and HyperTransport, a high-speed, low-latency, point-to-point link for direct communication between the processor and other hardware.

Getting to 45 nanometer
"There have been real challenges getting from 65 nm to 45 nm, and every step smaller is going to be more complicated," said Roger Kay, president of the Wayland, Mass.-based IT research and analysis firm, Endpoint Technologies Associates Inc. "Most OEMs have been anxious to see this development, because if Intel is the only game in town with 45 nm, it puts them in a weak negotiating position."

Intel Corp. Corp. has introduced new processor technologies at a faster cadence than AMD. In April 2007, the company announced its 45-nm processor technology and in November 2007, it released 45-nm Xeon processors.

With the help of IBM in the area of research and development, AMD can continue the path of creating smaller processors -- albeit about six months behind Intel, Kay said.

In December 2006, IBM and AMD presented the use of ultralow-K interconnect dielectrics and multiple enhanced transistor strain techniques for the 45-nm microprocessor process generation. The addition of ultralow-K interconnect provides a 15% reduction in wiring-related delay as compared with conventional low-K dielectrics, AMD said.

AMD's 45-nm strategy calls for the use of immersion lithography, which allows chipmakers to get an image of smaller levels than ever before, so they can further improve chip-level performance and manufacturing down to 32 nanometers and beyond.

The processors will also use faster but also cooler silicon-on-insulator (SOI) transistors. As a result, the processors consume fewer watts of power and generate less heat than they would with standard bulk silicon, AMD said.

Let us know what you think about the story; email Bridget Botelho, News Writer.

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