Modern processor design means integration, efficiency

The quest for improved integration, energy efficiency and performance is taking processor designs in new directions.

The constant push to boost computing performance and efficiency has taxed the venerable x86 architecture and presented modern processor design with new challenges.

It’s far from obsolete, but designers working with x86 systems face major challenges packing more transistors into less space while trying to use less energy, given current fabrication technologies. Enterprise system designers are discovering that a single processor isn’t necessarily the most efficient answer for computing tasks related to big data, generic private cloud, high performance computing or Web serving. Rather, matching a particular processor design to the specific task can provide superior computing performance -- often requiring just a fraction of the energy used for traditional x86 processors.

Improving processor design

Part 1: Modern processor design means integration, efficiency

Part 2: Reintroducing the RISC processor for data center servers

This is not a new concept. Purpose-built and reduced instruction set processors existed in everything from printers to network devices to industrial systems long before the rise of x86. But it was really the recent smartphone and tablet processors that demonstrated capable processing performance with miniscule energy needs. Those design philosophies are taking tomorrow’s enterprise processors in new and exciting directions, and providing designers with a rich array of processor alternatives for next-generation data center systems.

Purpose-built x86 processors

Consider the emergence of purpose-built processors that are designed to meet the unique computing needs of specific device types while maintaining compatibility with x86 instruction sets. A common example of this philosophy is Intel’s Atom family. Initial Atom releases were focused on mobile device and tablet applications, but second-generation Atom variants provide support for several enterprise-class tasks.

For example, the Atom Avoton is planned for microservers -- an emerging low-power, scalable computing appliance designed for easy installation and maintenance. A microserver may include the operating system, hardware and applications already installed by the system vendor for relatively lightweight tasks like serving up HTML webpages or handling individual compute tasks in a big data analysis. The Avoton is noteworthy for enterprise use because it adds 64-bit support to the low-power Atom core and Ethernet controllers for high-throughput networking and virtualization support. Avoton chips will also use a new 22 nanometer fabrication process that allows transistors to be stacked rather than placed side-by-side. This brings lower energy demands and shorter paths between transistors for better performance.

Another example is the Atom S12x9 family, which is slated to provide 40 lanes of PCI Express (PCIe) between the processor and I/O devices such as disk drives. These Atoms also tout hardware RAID acceleration and native dual-casting, which allows data to be read from one location and written to two locations simultaneously -- ideal for data protection technologies like memory mirroring. This emphasis on I/O support and data protection makes the S12x9 family of Atoms suitable for use in storage subsystems like storage servers.

Then there’s the Atom Rangeley processor, which is intended for networking appliances like routers, switches and security devices. Its specialty is processing traffic-intensive workloads using a cryptographic engine that supports 128-, 192- and 256-bit AES, 3DES, DES and Kasumi ciphers along with features like authentication, public key encryption and random number generation.

Purpose-built processors are typically multicore devices built with a system-on-chip (SoC) approach that incorporates almost all of the major components needed to implement a complete computer into the processor package itself. For example, the Avoton and Rangeley are expected to incorporate dual-channel double data rate version 3 (DDR3) memory controllers supporting up to 64 GB of error-correcting code (ECC) memory along with some PCIe controllers, SATA controllers, gigabit Ethernet controllers, USB and other legacy I/O (such as SMBus and UART) controllers. SoC integration decreases the overall chip count in the system, lowers costs, and improves performance due to shorter connection paths between the processor die and other functions.

An increasing number of modern SoC designs also incorporate a graphics processing unit (GPU) to assist in visualization-related tasks --though the Atom variants above do not. A good use might include a desktop virtualization (VDI) server that must deliver more complex renderings, images or real-time media like video that would bog down a conventional processor without graphics assistance. GPUs are also appearing in mainstream x86 server processors like Intel’s newest Xeon E3 and AMD’s emerging Opteron X processor series.

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