Understanding servers' Power-On Self-Test codes

Servers are chaotic and complex at startup, making errors during this stage even more difficult to diagnose. Power-On Self-Test codes can help.

Modern servers offer extensive Power-On Self-Test codes to help administrators identify problems that occur before the OS boots.

Each time a computer starts, the BIOS performs the Power-On Self-Test (POST) series of diagnostics to initialize the system's components and ensure they respond as expected; it then hands off the boot process to an operating system.

The basic approach to "POST-ing" a computer has not changed significantly since the original IBM PC hit the market, but modern servers are far more sophisticated than those early systems. And sophisticated systems demand more comprehensive and aggressive testing to ensure the server will operate properly.

POST basics

A computer always starts in an inoperable, chaotic state; hundreds of millions of transistors assume absolutely random binary conditions. A POST routine initializes and tests the computer before it can interact with a user or launch a workload.

Every microprocessor fetches the POST's first instruction from a single universal location. The BIOS is located starting at this first memory address. The CPU processes BIOS POST instructions and data according to the POST process.

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The first few steps of a POST are critical. The POST finishes initializing the first CPU and processor cache and then performs a basic initialization of the core chipset. This includes the Northbridge chip handling CPU and memory, and the Southbridge chip for interfaces like Serial Advanced Technology Advancement (SATA) for storage and PCI Express (PCIe) for external devices.

Comprehensive memory detection and testing comes next, where POST checks the characteristics of installed memory modules (serial presence detect), determines which modules are installed to fine-tune motherboard timing and then configures the system and performs a thorough memory test.

The POST then applies more detailed CPU and chipset tests, configuring the PCI host bridge and bus for PCIe cards, enabling any onboard video capabilities, setting up System Management Mode and the Advanced Configuration and Power Interface for chipset components. The POST also enables other Southbridge interfaces, including the SATA drives' Integrated Drive Electronics (IDE) interface, a SCSI interface and USB ports if the server has them. POST firmware also handles BIOS Recovery.

When the system passes initialization and testing, the POST launches a Bootstrap Loader, which hands off startup execution to the OS.

Power-On Self-Test codes

In earlier systems, POST problems were nearly impossible to diagnose. A fault early in the system's startup -- before the OS loads -- can prevent the system from booting, so how can you locate the actual problem point?

Most POST routines use five or fewer beep codes for the most catastrophic problems. Beep sequences trigger a unique series of long and/or short beeps when a fatal error is detected early in the POST, but audible error codes are cumbersome and easily misinterpreted.

BIOS POST codes are a more comprehensive answer. Each step in the POST is assigned a unique hexadecimal code. At each small step, the associated POST code is sent to a known port location. These are often called progress codes because they do not represent specific problems, but rather waypoints in the POST progress. POST readers monitor that location and display the POST codes as they process. Some motherboards, such as Intel's S2600GZ/GL, incorporate an LED POST code display on the back of the server board.

When the POST proceeds normally, progress codes fly by indiscernibly. When a problem occurs in a given POST routine and the system halts, the last code to appear indicates where the problem occurred. Computer technicians can easily determine where POST progress stopped and make an informed repair decision.

Although progress codes are a staple of POST diagnostics, new firmware versions incorporate another level of POST reporting for fatal errors. Fatal errors don't display on traditional POST readers because the hexadecimal codes are two bytes rather than one. Fatal errors are written to the server's event log for later evaluation and analysis.

Fatal POST errors represent problems with specific components, such as PCI bus issues, processor mismatches or internal error conditions, internal management controller problems, a wide assortment of memory problems (down to the specific module), port issues and even Trusted Platform Module troubles.

Server administrators should understand the basics of BIOS POST codes, but remember that a POST guides a correct and orderly startup until the boot is handed off to the OS. A POST process does not affect the server's operational reliability or availability.

Specific POST codes and their meanings will vary depending on the hardware and firmware vendors; always refer to Power-On Self-Test code documentation for your specific system.

This was first published in September 2013

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