Server performance and benchmark testing guide
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New processors use FPGA chips to accelerate applications, enabling server specialization with flexible program...
No single processor architecture handles every workload optimally, and the demand for efficiency at scale is pushing new, powerful app-centric servers. In one design, the central processing unit (CPU) offloads tasks to a field programmable gate array (FPGA) component.
Depending on the nature of the application, the tasks and the quality of hardware descriptive language (HDL) coding in the FPGA programming, FPGAs boost performance substantially.
Specialized servers vs. standard x86
A server can accelerate an application by reducing the computing instruction set (RISC), which shaves off latencies in the chip, but only works for apps tailored to use those instructions. Another method extends the processor command set to handle new tasks internally -- the opposite of RISC -- for more flexibility. The third option is to offload instructions from the processor to another computing component -- such as moving send/receive tasks to a network interface card -- which accelerates instruction processing.
The latest wrinkle in the server performance push is a new take on the offloading paradigm: pairing an x86 processor with a FPGA. The FPGA is customizable: It is programmed to boost a specific workload's performance, and then reprogrammed to accommodate changing needs in the future.
For example, a properly programmed FPGA could improve the throughput of graphics tasks, similar to co-processing with a CPU and graphics processing unit. With some reprogramming, however, the same FPGA could accelerate database searches. The best applications for acceleration (task offloading in this case) have frequent repetitive tasks or complex task sequences.
Pros and cons of servers with FPGA processors
FPGA-accelerated processors like Intel's Xeon E5+FPGA make the most sense when there is a massive quantity of servers running the same accelerated workloads. It's almost never economical to deploy FPGA servers for everyday data centers running a limited number of general business apps. This is mainly because of the work needed to develop the acceleration algorithms in HDL.
Not all FPGAs are equal; the best application performance comes from a larger FPGA with quality HDL coding. This means more logic gates interconnected most efficiently. A smaller FPGA programmed in a cumbersome manner cannot make as large of a difference for the workload.
The payoff for HDL development work isn't noticeable on an Exchange Server deployment. However, in cloud or Web-scale data centers, boosting performance a few percentage points across thousands of servers could save millions of dollars; consider a 10% faster search, OpenCL or big data analytical performance across 1,000 servers.
Using FPGAs for acceleration also adds a new wrinkle to change management, especially for large-scale data centers, because enterprise tools must track the FPGA algorithm as it is updated.
Inside an FPGA server
Intel developed a hybrid processor that pairs a Xeon E5 with an FPGA. The package looks and works just like a regular E5 (and fits into the same processor socket), but the setup allows the server to offload high-level tasks from the processor in order to accelerate certain applications. While the actual processor remains exactly the same, the FPGA offers a reprogrammable co-processor of sorts that optimizes a limited set of tasks.
Combining processors and FPGA devices is not new. Intel has done this with the Atom E600C series x86 processors. It includes memory and I/O, and is linked through a single-lane PCIe channel. The Intel Atom system-on-chip processors are used for lightweight Web-hosting servers, while the Xeon Phi is appearing in highly parallel processing tasks.
Juniper Networks is combining Intel Xeon E3-1125C v2 processors with Broadcom switching chips and Altera FPGAs to create a server on switch for the QFX5100-AA switch platform. The goal is to run financial services directly on the switch, which is accelerated by the FPGA.
Hyperscale data center operators are anxious to integrate FPGA capabilities. Microsoft's Catapult project added FPGAs on PCIe cards (not yet on CPUs) to more than 1,600 servers running the Bing search engine. The company's report showed almost double the throughput. Microsoft also added FPGA-enhanced Intel Xeon E5-26000 v3 processors to its second-generation open-source Open CloudServer specification.
Expect FPGA server technology to develop and trickle down to smaller, more general-purpose data centers, as evidenced by Intel's package of Xeon E5+FPGA. Libraries of HDL optimizations may even become available for everyday business apps.
About the author:
Stephen J. Bigelow is a senior technology editor at TechTarget, covering data center and virtualization technologies. He has acquired many CompTIA certifications in his more than two decades writing about the IT industry.
Hyperscale data centers create the need for new hardware