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What are the key differences in the PCI Express 3.0 standard?

Advances in the PCI Express 3.0 standard will benefit servers and accelerate data-intensive tasks for your next technology refresh cycle.

What is the PCI Express 3.0 standard and how does it differ from PCIe 2.0? Are there any systems or server motherboards that currently support PCIe 3.0? What will benefit from PCIe 3.0?

A bit of historical perspective is in order. The Peripheral Component Interconnect Special Interest Group (PCI-SIG) approved the now-familiar PCIe 2.0 specification in January 2007. Chipsets and system boards for version 2.0 started appearing in late 2007. Along with improvements to the protocol and drivers, the 2.0 iteration boosted the data transfer speed to 5 gigatransfers per second (GT/s) and increased the data rate per PCIe channel (or lane) to 500 MB per second, allowing a top-end, 32-lane PCIe device to support data rates of up to 16 GB per second (GBps).

The specification for PCIe 3.0, which appeared in November of 2010, improved numerous electrical characteristics for timing and signaling -- critical issues considering the physical limitations of copper interconnections. The 3.0 specification also increased the data transfer speed to 8 GT/s. When implemented with improvements to the data encoding scheme, PCIe 3.0 basically doubles the PCIe 2.0 bandwidth to about 32 GBps. Systems and devices designed for PCIe 3.0 from AMD, Intel and other manufacturers started appearing in January 2012.

Today, PCIe 3.0 is generally available on server motherboards and peripheral devices, but has not yet seen broad deployment across the data center because technology refresh cycles may not have upgraded PCIe 2.0 systems.

The benefit of PCIe 3.0 is primarily its high data transfer bandwidth. Peripheral devices that demand high-speed data transfers can potentially see dramatic performance improvements using the PCIe 3.0 interface. For example, RAID storage controllers, network interface controllers and especially high-performance graphics adapters/mathematics engines will benefit from a move to PCIe 3.0.

This was first published in April 2013

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